1. Field of the Invention
This invention relates to information technology (IT), and more particularly, to a circuit layout diagram testing point quantity determining method and system which is designed for use in conjunction with a computer platform for determining the required quantity of testing points for each electronic component on a circuit layout diagram that is created by using a CAD (Computer-Aided Design) circuit layout design program.
2. Description of Related Art
In the industry of electronics, the design of circuit boards typically utilizes a CAD (Computer-Aided Design) software program to draw the required circuit layout diagrams which are then used in automated processes to control the manufacture of circuit boards. The Allegro software system developed by the Cadence Corporation of USA, for example, is a widely employed CAD program that can help manufacturers in the layout design of circuit boards.
In practice, a computer motherboard or expansion card is typically incorporated with electronic components that include multiple electrical contact points, such as an integrated circuit chip with a BGA (Ball Grid Array) or a connector with an array of pins. These electrical contact points are typically categorized into signal I/O (input/output) points and grounding points, where the signal I/O points are used for receiving logic-HIGH voltage signals (typically a 1.5 V signal) and logic-LOW voltage signals (typically a 0 V signal), and the grounding points are used for connection with the ground (GND). In order to facilitate the testing of the signal I/O points and grounding points of each component, it is a common practice to add some testing points to the component, so that when the circuit board is fabricated, test engineers can carry out testing operations through these testing points. As standard criteria, the quantity of testing points is predefined to be one for every set of 30 electrical contact points (for both the grounding points and the signal I/O points). Accordingly, if a component has a total of 108 grounding points and 90 signal I/O points, it is required to add a quantity of 4 test points for the grounding points and a quantity of 3 test points for the signal I/O points.
Presently, a conventional method used by the Allegro CAD system for determining the required quantity of testing points on the circuit layout diagram of a BGA IC chip is to display all the grounding points and the signal I/O points in particular colors, such as displaying all the grounding points in green and all the signal I/O points in blue, so as to allow the user to visually count the total numbers of the grounding points and the signal I/O points, and then mentally calculating the required quantity of testing points based on the predefined criteria.
One drawback to the above-mentioned practice, however, is that a typical BGA IC chip could contain an array of several hundreds of electrical contact points; and therefore, it is quite tedious, laborious, and time-consuming for the user to visually and mentally determine the required quantity of testing points. In addition, it is more likely prone to error.